?2000 fairchild semiconductor international june 2000 rev. a, june 2000 FQA58N08 qfet qfet qfet qfet tm FQA58N08 80v n-channel mosfet general description these n-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar stripe, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for low voltage applications such as automotive, high efficiency switching for dc/dc converters, and dc motor control. features ? 64a, 80v, r ds(on) = 0.024 ? @v gs = 10 v ? low gate charge ( typical 50 nc) ? low crss ( typical 120 pf) ? fast switching ? 100% avalanche tested ? improved dv/dt capability ? 175 c maximum junction temperature rating absolute maximum ratings t c = 25c unless otherwise noted thermal characteristics symbol parameter FQA58N08 units v dss drain-source voltage 80 v i d drain current - continuous (t c = 25c) 64 a - continuous (t c = 100c) 45.2 a i dm drain current - pulsed (note 1) 256 a v gss gate-source voltage 25 v e as single pulsed avalanche energy (note 2) 560 mj i ar avalanche current (note 1) 64 a e ar repetitive avalanche energy (note 1) 18 mj dv/dt peak diode recovery dv/dt (note 3) 6.5 v/ns p d power dissipation (t c = 25c) 180 w - derate above 25c 1.2 w/c t j , t stg operating and storage temperature range -55 to +175 c t l maximum lead temperature for soldering purposes, 1/8 " from case for 5 seconds 300 c symbol parameter typ max units r jc thermal resistance, junction-to-case -- 0.83 c / w r cs thermal resistance, case-to-sink 0.24 -- c / w r ja thermal resistance, junction-to-ambient -- 40 c / w ! " ! ! ! " " " ! " ! ! ! " " " s d g to-3p fqa series g s d
rev. a, june 2000 FQA58N08 ?2000 fairchild semiconductor international (note 4) (note 4, 5) (note 4, 5) (note 4) electrical characteristics t c = 25c unless otherwise noted notes: 1. repetitive rating : pulse width limited by maximum junction temperature 2. l = 0.187mh, i as = 64a, v dd = 25v, r g = 25 ?, starting t j = 25c 3. i sd 57.5a, di/dt 300a/ s, v dd bv dss, starting t j = 25c 4. pulse test : pulse width 300 s, duty cycle 2% 5. essentially independent of operating temperature symbol parameter test conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 80 -- -- v ? bv dss / ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25c -- 0.07 -- v/c i dss zero gate voltage drain current v ds = 80 v, v gs = 0 v -- -- 1 a v ds = 64 v, t c = 150c -- -- 10 a i gssf gate-body leakage current, forward v gs = 25 v, v ds = 0 v -- -- 100 na i gssr gate-body leakage current, reverse v gs = -25 v, v ds = 0 v -- -- -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2.0 -- 4.0 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 32 a -- 0.018 0.024 ? g fs forward transconductance v ds = 30 v, i d = 32 a -- 34 -- s dynamic characteristics c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1.0 mhz -- 1450 1900 pf c oss output capacitance -- 520 680 pf c rss reverse transfer capacitance -- 120 155 pf switching characteristics t d(on) turn-on delay time v dd = 40 v, i d = 57.5 a, r g = 25 ? -- 16.5 45 ns t r turn-on rise time -- 200 410 ns t d(off) turn-off delay time -- 70 150 ns t f turn-off fall time -- 95 200 ns q g total gate charge v ds = 64 v, i d = 57.5 a, v gs = 10 v -- 50 65 nc q gs gate-source charge -- 9.3 -- nc q gd gate-drain charge -- 25 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- 64 a i sm maximum pulsed drain-source diode forward current -- -- 256 a v sd drain-source diode forward voltage v gs = 0 v, i s = 64 a -- -- 1.5 v t rr reverse recovery time v gs = 0 v, i s = 57.5 a, di f / dt = 100 a/ s -- 73 -- ns q rr reverse recovery charge -- 185 -- nc
FQA58N08 rev. a, june 2000 ?2000 fairchild semiconductor international 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 10 -1 10 0 10 1 10 2 175 notes : 1. v gs = 0v 2. 250 s pulse test 25 i dr , reverse drain current [a] v sd , source-drain voltage [v] 246810 10 -1 10 0 10 1 10 2 175 25 -55 notes : 1. v ds = 30v 2. 250 s pulse test i d , drain current [a] v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 0 10 1 10 2 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v bottom : 4.5 v notes : 1. 250 s pulse test 2. t c = 25 i d , drain current [a] v ds , drain-source voltage [v] 0 102030405060 0 2 4 6 8 10 12 v ds = 40v v ds = 64v note : i d = 57.5a v gs , gate-source voltage [v] q g , total gate charge [nc] 10 -1 10 0 10 1 0 500 1000 1500 2000 2500 3000 3500 4000 4500 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd notes : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitance [pf] v ds , drain-source voltage [v] 0 50 100 150 200 250 0 20 40 60 80 100 note : t j = 25 v gs = 20v v gs = 10v r ds(on) [m ], drain-source on-resistance i d , drain current [a] typical characteristics figure 5. capacitance characteristics figure 6. gate charge characteristics figure 3. on-resistance variation vs. drain current and gate voltage figure 4. body diode forward voltage variation vs. source current and temperature figure 2. transfer characteristics figure 1. on-region characteristics
?2000 fairchild semiconductor international FQA58N08 rev. a, june 2000 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 n o tes : 1 . z jc (t) = 0.83 /w m a x. 2 . d uty f acto r, d = t 1 /t 2 3 . t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), therm al response t 1 , square w ave pulse duration [sec] 25 50 75 100 125 150 175 0 10 20 30 40 50 60 70 i d , drain current [a] t c , case temperature [ ] 10 0 10 1 10 2 10 -1 10 0 10 1 10 2 10 3 10 s dc 10 ms 1 ms 100 s operation in this area is limited by r ds(on) notes : 1. t c = 25 o c 2. t j = 175 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 notes : 1. v gs = 10 v 2. i d = 28.75 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 notes : 1. v gs = 0 v 2. i d = 250 a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] typical characteristics (continued) figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 7. breakdown voltage variation vs. temperature figure 8. on-resistance variation vs. temperature figure 11. transient thermal response curve t 1 p dm t 2
FQA58N08 rev. a, june 2000 ?2000 fairchild semiconductor international charge v gs 10v q g q gs q gd 3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut charge v gs 10v q g q gs q gd 3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs e as =li as 2 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time 10v dut r g l i d t p e as =li as 2 ---- 2 1 e as =li as 2 ---- 2 1 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time 10v dut r g l l i d i d t p gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
?2000 fairchild semiconductor international FQA58N08 rev. a, june 2000 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
FQA58N08 rev. a, june 2000 ?2000 fairchild semiconductor international package dimensions 15.60 0.20 4.80 0.20 13.60 0.20 9.60 0.20 2.00 0.20 3.00 0.20 1.00 0.20 1.40 0.20 ?.20 0.10 3.80 0.20 13.90 0.20 3.50 0.20 16.50 0.30 12.76 0.20 19.90 0.20 23.40 0.20 18.70 0.20 1.50 +0.15 ?.05 0.60 +0.15 ?.05 5.45typ [5.45 0.30 ] 5.45typ [5.45 0.30 ] to-3p
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